Huawei pulls the Ascend 960 forward to early 2027 and talks about a million-chip machine

Huawei used its Connect conference in Shanghai this week to move its next AI accelerator forward by three quarters and to describe a computing stack that treats the individual chip as the small part of the problem.

Rotating chairman David Wang said the Ascend 960DT, aimed at training, is now due in the first quarter of 2027. The 960PR, aimed at inference, is due in the third quarter of 2027, one quarter earlier than planned. He put an Ascend 970 in 2028 and an Ascend 980 in 2029 and said the company intends to keep that annual cadence. He credited what Huawei calls the Tau Scaling Law for the speed-up.

Eric Xu, another rotating chairman, said the company cannot build enough AI computing equipment to meet demand inside China and is limiting overseas sales. Testing of the current-generation Ascend 950DT had gone well, he said, and talks with Chinese model developers were under way so that some of them can train on those systems next year. About 1,000 Ascend 910C sets are already deployed. The 950, launched last year, is in large-scale commercial use.

The machine around the chip

Wang also described two upgraded SuperPoDs, a near-packaged optical engine named Hi-ONE, a new Kunpeng CPU, UnifiedBus interconnect silicon, storage controllers and a network interface chip. One SuperPoD configuration holds 4,096 neural processing units, 8 exaflops at FP8 and about a petabyte of high-bandwidth memory. Hi-ONE is rated at 7.2 terabits per second per unit and carries its own light source.

UnifiedBus is the fabric Huawei wants to use to tie processors, memory and storage into one computer. The public claim is that supernodes can be joined into clusters of hundreds of thousands of processors, with a design target of one million. That number is a prospectus, not a shipping system. It is the sentence Huawei wants read next to Nvidia’s lead on single-chip performance.

Wang said Ascend is now the fourth hardware platform with official PyTorch support, after Nvidia, AMD and Intel, and the first Chinese platform on that list. Developers can target the hardware without a private fork. That is a software fact with commercial weight inside China, where Nvidia’s best parts are barred.

What the embargo did, and did not, do

US rules have kept the fastest Nvidia accelerators out of Chinese data centres. Huawei’s answer has not been to match those parts transistor for transistor. It has been to ship more of its own parts, wire them more tightly, and accept that each chip is weaker if the rack is larger. Xu’s supply comment cuts both ways. Demand inside China is real. Capacity is the constraint. Export customers are being told to wait.

Eleven AI-related chipsets were put on the slide list across accelerators, CPUs and networking. The 960 dates are the headline because they moved. The optical engine and the 4,096-NPU pod are the part of the keynote that decides whether Huawei is building a competitor to a GPU or a competitor to a cluster.

The calendar that now matters

Q1 2027 is 15 months away. If the 960DT lands on that date, at the performance Wang sketched, Chinese labs will have a training part that is not a smuggled Nvidia board. If it slips, the 950 and 910C remain the workhorses and the million-chip drawing stays on a slide. PyTorch support does not by itself produce yields, HBM or the lasers inside Hi-ONE.

For buyers outside China the practical news this week is Xu’s rationing line. Huawei is selling at home first. For buyers inside China the practical news is a date they can put on a procurement plan and a cluster design that assumes optics and interconnect will do the work a single banned GPU cannot.